STEC Requires Sr Engineer / Staff Engineer - R&D for Penang

STEC Requires Sr Engineer / Staff Engineer - R&D for Penang

STEC Requires Sr Engineer / Staff Engineer - R&D for PenangSTEC is a leading global provider of Solid State technologies and solutions tailored to meet the high-performance, high reliability needs of original equipment manufacturers (OEMs).

With headquarters in Santa Ana, California and worldwide locations, STEC leverages over two decades of Solid State knowledge and experience to deliver the industry's most comprehensive line of Solid State Drives. STEC's mission is to provide the world's highest level of quality, reliability and innovation to the storage industry with the directive to advance Solid State technology for emerging storage applications.

In line with our growth, we invite bright and talented individuals to join us in fulfilling your career aspirations with a technology leader. Join STEC today.

Position: Sr Engineer / Staff Engineer - R&D (PCB Layout)
Work Location: Penang - Bayan Lepas Industrial Park, Phase 4

Responsibilities:
The qualified individual will be a hands-on contributor in the development of high performance solid state flash drives. Candidate should be well versed in high speed digital design and be familiar with various storage protocols (SATA, SAS, Fibre Channel and PCIe) and memory elements such as SRAM, DRAM, DDR, microprocessors, ASICs and Flash (NAND EEPROM).

The primary responsibility of PCB Layout Engineer is to work closely with different functional teams of Hardware Engineer, Mechanical Engineer and Manufacturing Engineer to design the PCB layout of derivative products of Solid State Drives (SSD).

Accompanying tasks include creating new symbols and PCB footprint, maintaining ECAD library and providing technical support to Manufacturing Engineering team. Knowledge of high speed memory routing, serial signaling protocols, and PCB Signal Integrity issues is essential. This individual will take part in creating and implementing PCB designs and establishing PCB design practices.

The successful candidate must be organized, able to solve problems daily and overcome technical challenges related to PCB design, PCB technology and PCB assembly.

This candidate must thrive in a group environment. The ability to interface comfortably with coworkers and vendors is a must. To be successful, they must be able to deal with multiple simultaneous requests, and be adaptable and flexible in a dynamic environment with ever changing priorities.

Essential Duties & Responsibilities:
  • Working on PCB layout of SSD Main Board and Daughter Card using Cadence Allegro PCB Editor
  • Performing DRC and DFM verification to ensure defect-free PCB design
  • Performing PCB signal integrity simulation/verification on PCB design
  • Post processing data preparation for PCB fabrication and assembly
  • Creation of logical symbol and PCB footprint, and maintenance of ECAD Library
  • Participating in PCB design kick-off, design review and post-mortem meeting
  • Working closely with multi-discipline teams to understand, gather and incorporate the design requirements into PCB design
  • Providing technical support to Manufacturing Engineering and Supply Chain on PCB related issues

Requirements:
To perform this job successfully, the successful individual must be able to perform each essential duty satisfactorily. The requirements listed below are representative of the knowledge, skill, and/or ability required. Reasonable accommodations may be made to enable individuals with disabilities to perform the essential functions.

  • MSc or BSc in Engineering/Science (BE, BS, ME, MS)
  • At least 3-5 years working experience in PCB layout, with experience in High Speed PCB design is a plus
  • Excellent skills in PCB EDA tools, especially in Cadence Allegro PCB Editor and OrCAD Schematic Capture
  • Familiarity with PCB design process, from the front-end schematic capture till the back-end of post processing data preparation
  • Basic knowledge of High Speed Digital design and PCB Signal Integrity
  • Familiarity with physical and electrical rules driven design with the use of Constraint Manager System
  • Familiarity with PCB DFM, DFF rules and IPC specifications
  • Experience in logical symbol and PCB footprint creation
  • Knowledge in PCB technology, PCB Stack-up, PCB material and PCB fabrication process
  • Experience in using DFM Verification and Gerber Viewer tools such as Valor Enterprise3000, CAM350, Viewmate or GC Prevue
  • Well organized and able to work in group environments
  • Good communication skills
  • Ability to prioritize and manage several simultaneous tasks

Preferred skill(s):
  • Knowledge of SSD PCB Layout would be desirable
  • Familiarity with best practices and design guidelines of high speed PCB layout
  • Experience in routing the fine pitch & high pin count FPGA layout
  • Knowledge and experience in routing DDRx layout
  • Knowledge and experience in routing HDI PCB with microvia & buried via
  • Experience & knowledge in PCB Signal Integrity simulation, IBIS model and PSPICE simulation is a plus

Language Skills:
  • Strong – written and verbal English
  • Optional – verbal Mandarin and Bahasa Malaysia

Interested candidates are invited to email their complete resumes to the following email address below.

STEC is an Equal Employment Opportunity Employer. All applications will be regarded equally and will be kept confidential


Closing Date: 15 February 2012

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